Yin-Yang: Programming Abstractions for Cross-Domain Multi-Acceleration

• Type of Material: Article
• Authors: Joon Kyung Kim, University of California San Diego; Byung Hoon Ahn, University of California San Diego; Sean Kinzer, University of California San Diego; Soroush Ghodrati, University of California San Diego; Rohan Mahapatra, University of California San Diego; Brahmendra Yatham, University of California San Diego; Shu-Ting Wang, University of California San Diego; Dohee Kim, KAIST; Parisa Sarikhani, Emory University; Babak Mahmoudi, Emory University; Divya Mahajan, Microsoft; Jongse Park, KAIST; Hadi Esmaeilzadeh, University of California San Diego
• Language: English
• Date: 2022-09-01
• Publisher: IEEE Xplore
• Publication Version: Author Accepted Manuscript (After Peer Review)
• Copyright Statement: © 2022, IEEE
• Final Published Version (URL): https://doi.org/10.1109%2Fmm.2022.3189416
• Title of Journal or Parent Work: IEEE Micro
• Volume: 42
• Issue: 5
• Start Page: 89
• End Page: 98
• Grant/Funding Information: This work was in part supported by generous gifts from Google, Samsung, Qualcomm, Microsoft, Xilinx, as well as the National Science Foundation (NSF) awards CCF#2107598, CNS#1822273, National Institute of Health (NIH) award #R01EB028350, Defense Advanced Research Project Agency (DARPA) under agreement number #HR0011–18-C-0020, and Semiconductor Research Corporation (SRC) award #2021-AH-3039. This work was also partly supported by Institute of Information & communications Technology Planning & Evaluation (IITP) grant funded by the Korean Government (MSIT) (No.2018–0-00503, Researches on next generation memory-centric computing system architecture; and No.2022–0-01037, Development of high performance processing-in-memory technology based on DRAM). The U.S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright notation thereon.
• Keywords: Reconfigurable Hardware; Runtime Environments; Compilers; Heterogeneous (Hybrid) Systems; Hardware/Software Interfaces
• Research Categories: Computer Science

Abstract

FPGA accelerators offer performance and efficiency gains by narrowing the scope of acceleration to one algorithmic domain. However, real-life applications are often not limited to a single domain, which naturally makes Cross-Domain Multi-Acceleration a crucial next step. The challenge is, existing FPGA accelerators are built upon their specific vertically-specialized stacks, which prevents utilizing multiple accelerators from different domains. To that end, we propose a pair of dual abstractions, called Yin-Yang, which work in tandem and enable programmers to develop cross-domain applications using multiple accelerators on a FPGA. The Yin abstraction enables cross-domain algorithmic specification, while the Yang abstraction captures the accelerator capabilities. We also develop a dataflow virtual machine, dubbed XLVM, that transparently maps domain functions (Yin) to best-fit accelerator capabilities (Yang). With six real-world cross-domain applications, our evaluations show that Yin-Yang unlocks 29.4× speedup, while the best single-domain acceleration achieves 12.0×.